| KS OmniScriptum Publishing

112,610원  | 20121106  | 9783659256202

This book gives an idea of modifications in fabrication steps of 22nm MOS transistor. A 22nm MOS transistor results are compared with a new modification process of stress.Their are two types of stress uniaxial and biaxial stress. Key Features: 1. Concept of Scaling. 2. Basic concept of MOS transistor. 3. Fabication process of 180nm MOS transistor. 4. Modified processes used in fabrication of 22nm MOS transistor.

Tsividis, Yannis  | Oxford Univ Pr

394,110원  | 20081001  | 9780195170153

Operation and Modeling of the MOS Transistor has become a standard in academia and industry. Extensively revised and updated, the third edition of this highly acclaimed text provides a thorough treatment of the MOS transistor-the key element of modern microelectronic chips.

Enz, Christian/ Vittoz, Eric  | Wiley

215,170원  | 20091114  | 9780470855416

As technology scales down to sub-micron dimensions the modelling of MOS device operation becomes of greater concern. The EKV model has been developed to facilitate the modelling and simulation of low voltage devices for application in low power semiconductor technologies.

 | KS OmniScriptum Publishing

128,700원  | 20100622  | 9783838369914

FGMOS, a MOSFET with an additional electrically isolated gate known as floating-gate, has been used in digital circuit design for quite some time with applications in the design of memories. The charge stored on the floating-gate affects the conductivity of the channel and in turn alters the threshold voltage. This imparts programmability to threshold voltage of a FGMOS to make it suitable for low voltage analog circuit structures.

 | Oxford University Press Inc

0원  | 20120913  | 9780199829835

Operation and Modeling of the MOS Transistor has become a standard in academia and industry. Extensively revised and updated, the third edition of this highly acclaimed text provides a thorough treatment of the MOS transistor?the key element of modern microelectronic chips.

 | OmniScriptum GmbH & Co KG

146,570원  | 20180228  | 9786131501739

Le transistor a ionisation par impact (I-MOS) est une nouvelle architecture presentant l'avantage de s'affranchir de la barriere des 60mV/dec a temperature ambiante, qui limite la pente sous le seuil de l'architecture MOSFET classique. Le I-MOS se presente comme une diode PiN dont la zone intrinseque est partiellement recouverte par une grille.

 | Editions Universitaires Europeennes

166,230원  | 20200529  | 9783838182230

Etude et modelisation compacte d'un transistor MOS SOI double-grille dedie a la conception Nous proposons un modele compact du transistor MOS double-grille silicium sur isolant (SOI) en mode de fonctionnement symetrique.