| Springer Nature B.V.

73,980원  | 20220915  | 9781484263525

Discover how Verilog-A is particularly designed to describe behavior and connectivity of circuits and system components for analog SPICE-class simulators, or for continuous time (SPICE-based) kernels in Verilog-AMS simulators. With continuous updates since it's release 30 years ago, this practical guide provides a comprehensive foundation and understanding to the? modeling language in its most recent standard formulation.

Mijalkovic, Slobodan  | Apress

101,730원  | 20220304  | 9781484263501

Considers the challenges of historical audience research in the field of screen studies.

 | Springer Verlag

233,080원  | 20160924  | 9783319330983

A partial list of design topics includes design partitioning, hierarchy decomposition, safe coding styles, back annotation, wrapper modules, concurrency, race conditions, assertion-based verification, clock synchronization, and design for test.

 | KS OmniScriptum Publishing

144,300원  | 20120321  | 9783848423248

In electronics, a hardware description language or HDL is any language from a class of computer languages, specification languages, or modeling languages for formal description and design of electronic circuits, and most-commonly, digital logic. It can describe the circuit's operation, its design and organization, and tests to verify its operation by means of simulation. HDLs are standard text-based expressions of the spatial and temporal structure and behaviour of electronic systems.

 | Springer

149,830원  | 20240927  | 9783031410871

The book is designed to serve as a textbook for courses offered to undergraduate and graduate students enrolled in electrical, electronics, and communication engineering. The book covers basic topics of digital logic design like binary number systems, combinational circuit design, sequential circuit design, and finite state machine (FSM) design.

 | Editions Notre Savoir

86,950원  | 20240704  | 9786207752058

La conception et la verification du protocole Serial Peripheral Interface (SPI) a l'aide de Verilog sont essentielles pour garantir l'integration transparente et la fonctionnalite des systemes de communication bases sur SPI dans les conceptions numeriques. Cet article presente une approche complete du developpement et de la validation de la mise en œuvre du protocole SPI a l'aide du langage de description materielle Verilog.

Readler, Blaine  | Lightning Source Inc

36,900원  | 20130123  | 9780983497301

A practical primer for the student and practicing engineer already familiar with the basics of digital design, the reference develops a working grasp of the verilog hardware description language step-by-step using easy-to-understand examples. Starting with a simple but workable design sample, increasingly more complex fundamentals of the language are introduced until all major features of verilog are brought to light.

Sutherland, Stuart  | Kluwer

203,480원  | 20210101  | 9780792375685

The IEEE 1364-2001 standard, nicknamed Verilog-2001', is thefirst major update to the Verilog language since its inception in1984. This book presents 45 significant enhancements contained inVerilog-2001 standard. A few of the new features describe...

 | Kluwer

314,480원  | 20100605  | 9780792373681

The first edition of Principles of Verifiable RTL Design offered a common sense method for simplifying and unifying assertion specification by creating a set of predefined specification modules that could be instantiated within the designer's RTL. Since the release of the first edition, an entire industry-wide initiative for assertion specification has emerged based on ideas presented in the first edition. This initiative, known as the Open Verification Library Initiative (www.verificationlib.

Lee, James M.  | Kluwer

314,480원  | 20210101  | 9780792376729

"Verilog Quickstart" has been revised and updated in accordance with the new IEEE 1364-1999 standard, much of which applies to synthesizable Verilog. New examples have been included as well as additional material added throughout.

Sutherland, Stuart  | Springer

406,980원  | 20100604  | 9780792376583

The Verilog Programming Language Interface is a powerful feature of the Verilog standard. Through this interface, a Verilog simulator can be customized to perform virtually any engineering task desired, such as adding custom design debug utilities, adding proprietary file read/write utilities, and interfacing bus functional C language models to a simulator. This book serves as both a user's guide for learning the Verilog PLI, and as a comprehensive reference manual on the Verilog PLI standard. Both the TF/ACC ("PLI 1.0") and the VPI ("PLI 2.0") generations of the PLI are presented, based on the IEEE 1364 Verilog standard. The second edition of this book adds detailed coverage of the many enhancements added in the latest IEEE 1364-2001 Verilog standard ("Verilog-2001"). A CD is included, with the C source code, Verilog HDL test cases and simulation result logs for more than 75 complete PLI examples.

Rafiquzzaman, M., McNinch, Steven A.  | Wiley

52,250원  | 20190911  | 9781119621638

Digital Logic with an Introduction to Verilog and FPGA-Based Design provides basic knowledge of field programmable gate array (FPGA) design and implementation using Verilog, a hardware description language (HDL) commonly used in the design and verification of digital circuits. Emphasizing fundamental principles, this student-friendly textbook is an ideal resource for introductory digital logic courses.

Reese, Robert B./ Thornton, Mitchell A.  | Morgan and Claypool Publishers

64,750원  | 20090818  | 9781598291063

Introduction to Logic Synthesis Using Verilog HDL explains how to write accurate Verilog descriptions of digital systems that can be synthesized into digital system netlists with desirable characteristics. The book contains numerous Verilog examples that begin with simple combinational networks and progress to synchronous sequential logic systems. Common pitfalls in the development of synthesizable Verilog HDL are also discussed along with methods for avoiding them.

Williams, John Michael  | Springer

314,480원  | 20150306  | 9783319047881

A partial list of design topics includes design partitioning, hierarchy decomposition, safe coding styles, back annotation, wrapper modules, concurrency, race conditions, assertion-based verification, clock synchronization, and design for test.