Low Power Design in Deep Submicron Electronics (Paperback, 1997)

1. Introduction; W. Nebel. 2. Application and Technology Forecast; D.J. Frank. 3. Low Power Design Flow and Libraries; M. Laurent, M. Briet. 4. Low Power Circuit and Logic Level Design. 4.1. Modeling; J. Figueras. 4.2. Circuit and Logic Level Design; C. Piguet. 4.3. Power Estimation at the Logic Level; W. Nebel. 4.4. Advanced Power Estimation Techniques. 5. Power Optimization. 5.1. Layout Optimization; J. Cong, et al. 5.2. Combinational Circuit Optimization; S. Iman, M. Pedram. 5.3. Sequential Synthesis and Optimization for Low Power; E. Macii. 5.4. RT and Algorithmic-Level Optimization for Low Power; E. Macii. 5.5. High Level Synthesis for Low Power; E. Macii. 6. System Level Low Power Design. 6.1. Embedded System Design; S.B. Furber. 6.2. Power Analysis and Design at System Level; K. Roy. 6.3. Software Design for Low Power; K. Roy, M.C. Johnson. 7. Asynchronous Design; S.B. Furber. 8. Low Voltage Technologies; C. Svensson. 9. Case Studies. 9.1. Microprocessor Design; C. Piguet. 9.2. Low Power Applications at System level; L. Claesen, et al. Index.