On Optimal Interconnections for Vlsi (Hardcover)

List of Figures. List of Tables. 1: Preliminaries. 1.1. Preface. 1.2. The Domain of Discourse: Routing in VLSI Physical Design. 1.3. Overview of the Book. 1.4. Acknowledgements. 2: Area. 2.1. Introduction. 2.2. Performance Bounds for MST-Based Strategies. 2.3. Iterated 1-Steiner (I1S). 2.4. Enhancing I1S Performance. 2.5. Practical Implementation Options for I1S. 2.6. On the Maximum MST Degree. 2.7. Steiner Trees in Graphs. 3: Delay. 3.1. Preliminaries. 3.2. Geometric Approaches to Delay Minimization. 3.3. Minimization of Actual Delay. 3.4. New Directions. 4: Skew. 4.1. Preliminaries. 4.2. An Early Matching-Based Approach. 4.3. DME: Exact Zero Skew with Minimum Wirelength. 4.4. Planar-Embeddable Trees. 4.5. Remarks. 5: Multiple Objectives. 5.1. Minimum Density Trees. 5.2. Multi-Weighted Graphs. 5.3. Prescribed-Width Routing. A: Appendix: Signal Delay Estimators. A.1. Basics. A.2. Accuracy and Fidelity. References. Author Index. Term Index.