Introduction to Reconfigurable Computing: Architectures, Algorithms, and Applications (Hardcover, 2007)

Foreword. Preface. List of Figures. List of Tables. 1. INTRODUCTION. 1 General Purpose Computing. 2 Domain Specific Processors. 3 Application Specific Processors. 4 Reconfigurable Computing. 5 Fields of Application. 6 Organization of the book. 2. RECONFIGURABLE ARCHITECTURES. 1 Early Work. 2 Simple Programmable Logic Devices. 3 Complex Programmable Logic Device. 4 Field Programmable Gate Arrays. 5 Coarse-grained reconfigurable devices. 6 Conclusion. 3. IMPLEMENTATION. 1 Integration. 2 FPGA Design Flow. 3 Logic Synthesis. 4 Conclusion. 4. HIGH-LEVEL SYNTHESIS FOR RECONFIGURABLE DEVICES. 1 Modelling. 2 Temporal partitioning algorithms. 3 Conclusion. 5. TEMPORAL PLACEMENT. 1 Off-Line Temporal Placement. 2 On-Line Temporal Placement. 3 Managing the Device's Free Space with Empty Rectangles. 4 Managing the Device's Occupied Space. 5 Conclusion. 6. ON-LINE COMMUNICATION. 1 Direct Communication. 2 Communication Over Third Party. 3 Bus-based Communication. 4 Circuit Switching. 5 Network on Chip. 6 The Dynamic Network on Chip (DyNoC). 7 Routing Packets. 8 Analysis of efficiency. 9 DyNoC Implementation on FPGAs. 10 Conclusion. 7. PARTIAL RECONFIGURATION DESIGN. 1 Partial Reconfiguration on Virtex Devices. 2 Bitstream Manipulation with JBits. 3 The Modular Design Flow. 4 The Early Access Design Flow. 5 Creating partially reconfigurable designs. 6 Partial Reconfiguration using Handel-C Designs. 7 Platform design. 8 Enhancement in the Platform Design. 9 Conclusion. 8. SYSTEM ONA PROGRAMMABLE CHIP. 1 Introduction to SoPC. 2 Adaptive Multiprocessing on Chip. 3 Conclusion. 9. APPLICATIONS. 1 Pattern Matching. 2 Video Streaming. 3 Distributed Arithmetic. 4 Adaptive controller. 5 Adaptive Cryptographic Systems. 6 Software Defined Radio. 7 High Performance Computing. 8 Conclusion References. Appendices. A Hints to Labs. 1 Prerequisites. 2 Reorganization of the project Video8nonpr. B Party. C QuickPart-YTutorial.