High Performance Memory Testing: Design Principles, Fault Modeling and Self-Test (Hardcover, 2003)

Preface. Section I: Design & Test of Memories. 1. Opening Pandora's Box. 2. Static Random Access Memories. 3. Multi-Port Memories. 4. Silicon On Insulator Memories. 5. Content Addressable Memories. 6. Dynamic Random Access Memories. 7. Non-Volatile Memories. Testing II: Memory Testing. 8. Memory Faults. 9. Memory Patterns. Section III: Memory Self Test. 10. BIST Concepts. 11. State Machine BIST. 12. Micro-Code BIST. 13. BIST and Redundancy. 14. Design For Test and BIST. 15. Conclusions. Appendices. Appendix A. Further Memory Fault Modeling. Appendix B. Further Memory Test Patterns. Appendix C. State Machine HDL. References. Glossary/Acronyms. Index. About the Author.