Substrate Noise Coupling in Mixed-Signal Asics (Hardcover)

Contributors. Foreword. Projects in the mixed-signal design cluster. Introduction; G.G.E. Gielen, S. Donnay. 1. Context. 2. Book overview. 1: Technology impact on substrate noise; F.J.R. Clement. 1. Introduction. 2. Substrate physics. 3. Parasitic substrate effects. 4. Wafer impact. 5. Fabrication processes. 6. Conclusions. 2: Substrate noise generation in complex digital systems; S. Donnay, M. van Heijningen, M. Badaroglu. 1. Introduction. 2. Sources of substrate noise. 3. Substrate modeling. 4. How to measure substrate noise. 5. First mixed-signal test chip with simple inverter chains. 6. Second test chip: a 86-Kgate digital filter bank. 7. Conclusions. 3: Modeling and analysis of substrate noise coupling in mixed-signal ICs; N. Verghese, Wen Kung Chu, J. McCanny. 1. Introduction. 2. Substrate noise analysis methodology. 3. Modeling parasitics. 4. Substrate parasitics. 5. Analysis of substrate noise. 6. Analysis of impact of substrate noise. 7. Substrate noise analysis data flow. 8. A design example. 9. Summary. 4: SPACE for substrate resistance extraction; N.P. van der Meijs. 1. Introduction. 2. Substrate analysis overview. 3. The Boundary Element Method. 4. Parametric modeling method. 5. Combined BEM/FEM Modeling. 6. The SPACE Layout to Circuit Extractor.7. Conclusion. 5: Models and parameters for crosstalk simulation; V. Liberali. 1. Introduction. 2. Design methodology. 3. Modeling. 4. Parameters. 5. Simulation. 6. Validation of the proposed approach. 7. Conclusion. 6: High-level simulation of substrate noise generation in complex digital systems; M.Badaroglu, M. van Heijningen, S. Donnay. 1. Introduction. 2. Library characterization. 3. Substrate noise simulation. 4. Experimental results. 5. Conclusions. 7: Modeling the impact of digital substrate noise on analog integrated circuits; Y. Zinzius, G. Gielen, W. Sansen. 1. Introduction. 2. Overview of substrate noise impact in analog circuits. 3. Modeling the digital substrate noise impact on analog circuits. 4. Measurements of the impact of digital substrate noise on analog designs. 5. Conclusions. 8: Measuring and modeling the effects of substrate noise on the LNA for a CMOS GPS receiver; Min Xu, B.A. Wooley. 1. Introduction. 2. General model of the effect of substrate noise on analog circuits. 3. Substrate noise characterization. 4. Noise coupling into the LNA. 5. A statistical approach to substrate noise characterization for digital circuits. 6. Conclusion. 9: A practical approach to modeling silicon-crosstalk in systems-on-silicon; P.T.M. van Zeijl. 1. Introduction. 2. Problem statement.