Analog Circuit Design: Fractional-N Synthesizers, Design for Robustness, Line and Bus Drivers (Hardcover, 2003)

Preface. Part I: Fractional-N-Synthesis ; A. van Roermund. Practical Design Aspects in Fractional-N-Synthesis; W. Rhee. Design and Simulation of Fractional-N-Frequency Synthesizers; M. Perott. Monolithic CMOS Fractional-N-Frequency Synthesizer Design for High Spectral Purity; B. De Muer, M. Steyaert. A 19mW 2.2GHz Fully Integrated CMOS Sigma Delta Fractional Synthesizer with 35Hz Frequency Step and Quantization Noise Compensation; I. Bietti, G. Albasini, E. Temporiti, R. Castello. Implementation Aspects of Fractional-N Techniques in Cellular Handsets; Y. Le Guillou, D. Brunel. Fractional-N Phase Locked Loops and its Application in the GSM System; G. Marzinger, B. Neurauter. Part II: Design for Robustness ; M. Steyaert. ESD for Analogue Circuit Design; D. Clarke, A. Righter. ESD in Smart Power Processes; G. Croce, A. Andreini, L. Cerati, G. Meneghesso, L. Sponton. RF-ESD Co-Design for High-Performance CMOS LNAs; P. Leroux, M. Steyaert. Improvement of System Robustness through EMC Optimization; B. Deutschmann. Robustness in Analog Design; M. De Mey. Minimizing Undesired Coupling and Interaction in Mixed Signal ICs; T.J. Schmerbeck. Part III: Line and Bus Drivers J. Huijsing. Looking to/for Low Power ADSL Drivers in the DSLAM; E. Moons. Class-AB Low-Distortion Drivers for ADSL; T. Ferianz. Class D Self-Oscillating Line Drivers; T. Piessens, M. Steyaert. Class G/H Line Drivers for xDSL; J. Pierdomenico. The USB 2.0 Physical Layer: Standard and Implementation; G. den Besten. Backplane Transceivers; K. Tam, W. Ellersick, R. Soenneker.