Interconnect-Centric Design for Advanced Soc and Noc (Hardcover, 2004)

Preface 1.Introduction Jari Nurmi, Hannu Tenhunen, Jouni Isoaho, Axel Jantsch 2. System-on-Chip Challenges in the Deep-Submicron Era Jan M. Rabaey PART I: PHYSICAL AND ELECTRICAL ISSUES 3. Wires as Interconnects Li-Rong Zheng, Hannu Tenhunen 4. Global Interconnect Analysis Towards NoC Tero Nurmi, Jian Liu, Dinesh Pamunuwa, Tapani Ahonen, Li-Rong Zheng, Jouni Isoaho, Hannu Tenhunen 5. Design Methodologies for On-Chip Inductive Interconnect Magdy A. El-Moursy, Eby Friedman 6. Clock Generation and Distribution for High-Performance SoC Designs Stefan Rusu PART II: LOGICAL AND ARCHITECTURAL ISSUES 7. Error-Tolerant Interconnect Schemes Heiko Zimmer, Axel Jantsch 8. Power Reduction Coding for Buses Paul P. Sotiriadis 9. Overview of SoC Buses Vesa Lahtinen, Erno Salminen, Kimmo Kuusilinna, Timo D. Hamalainen 10. From Buses to Networks David Siguenza Tortosa, Jari Nurmi 11. Arbitration and Routing Schemes for On-Chip Packet Networks Heikki Kariniemi, Jari Nurmi PART III: DESIGN METHODOLOGY AND TOOLS 12. Methodology and Techniques for Noise Reduction in SoC Interconnects Pasi Liljeberg, Johanna Tuominen, Sampo Tuuna, Juha Plosila, Jouni Isoaho 13. Formal Communication Modeling and Refinement Juha Plosila, Tiberiu Seceleanu, Kaisa Sere 14. High-Level Communication Models for On-Chip Multiprocessor System Simulation Jan Madsen, Shankar Mahadevan, Kashif Virk 15. Socket-based Design Using Decoupled Interconnects Drew Wingard PART IV: APPLICATION CASES 16. Interconnect and Memory Organization in SOCs for Advanced Set-Top Boxes and TV Kees Goossens, Om. Prajash Gangwal, Jens Rover, A.P. Niranjan 17. A Brunch for the Coffee Table - Case Study in NOC Platform Design Tapani Ahonen, Seppo Virtanen, Juha Kylliainen, Dragos Truscan, Tuukka Kasanko, DavidSiguenza Tortosa, Tapio Ristimaki, Jani Paakkulainen, Tero Nurmi, Ilkka Saastamoinen, Hannu Isannainen, Johan Lilius, Jari Nurmi, Jouni Isoaho