Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits (Hardcover)

Fundamentals of Small-Delay Defect Testing
Sudhakar M. Reddy and Peter Maxwell

Timing-Aware ATPG
K Longest Paths
Duncan M. (Hank) Walker
Timing-Aware ATPG
Mark Kassab, Benoit Nadeau-Dostie, and Xijiang Lin

Faster-than At-Speed
Faster-than-at-Speed Test for Screening Small-Delay Defects
Nisar Ahmed and Mohammad Tehranipoor
Circuit Path Grading Considering Layout, Process Variations, and Cross Talk
Ke Peng, Mahmut Yilmaz, and Mohammad Tehranipoor

Alternative Methods
Output Deviations-Based SDD Testing
Mahmut Yilmaz
Hybrid/Top-off Test Pattern Generation Schemes for Small-Delay Defects
Sandeep K. Goel and Narendra Devta-Prasanna
Circuit Topology-Based Test Pattern Generation for Small-Delay Defects
Sandeep K. Goel and Krishnendu Chakrabarty

SDD Metrics
Small-Delay Defect Coverage Metrics
Narendra Devta-Prasanna and Sandeep K. Goel