책 이미지
eBook 미리보기
책 정보
· 제목 : Systemverilog for Verification: A Guide to Learning the Testbench Language Features (Hardcover, 3, 2012)
· 분류 : 외국도서 > 컴퓨터 > CAD-CAM
· ISBN : 9781461407140
· 쪽수 : 464쪽
· 출판일 : 2012-02-14
· 분류 : 외국도서 > 컴퓨터 > CAD-CAM
· ISBN : 9781461407140
· 쪽수 : 464쪽
· 출판일 : 2012-02-14
목차
Verification Guidelines.- Data Types.- Procedural Statements and Routines.- Connecting the Testbench and Design.- Basic OOP.- Randomization.- Threads and Interprocess Communication.- Advanced OOP and Testbench Guidelines.- Functional Coverage.- Advanced Interfaces.- A Complete SystemVerilog Testbench.- Interfacing with C/C++.
