Logical Effort: Designing Fast CMOS Circuits (Paperback)

1 The Method of Logical Effort
2 Design Examples
3 Deriving the Method of Logical Effort
4 Calculating the Logical Effort of Gates
5 Calibrating the Model
6 Asymmetric Logic Gates
7 Unequal Rising and Falling Delays
8 Circuit Families
9 Forks of Amplifiers
10 Branches and Interconnect
11 Wide Structures
12 Conclusions
A Cast of Characters
B Reference process parameters
C Logical Effort Tools
D Solutions