Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology (Hardcover, 2)

RTL TO GDSII, OR SYNTHESIS, PLACE, AND ROUTE

Design Flows
David Chinnery, Leon Stok, David Hathaway, and Kurt Keutzer

Logic Synthesis
Sunil P. Khatri and Narendra V. Shenoy

Power Analysis and Optimization from Circuit to Register-Transfer Levels
Jose Monteiro, Rakesh Patel, and Vivek Tiwari

Equivalence Checking
Andreas Kuehlmann and Fabio Somenzi

Digital Layout: Placement
Andrew B. Kahng and Sherief Reda

Static Timing Analysis
Jordi Cortadella and Sachin S. Sapatnekar

Structured Digital Design
Minsik Cho, Mihir Choudhury, Ruchir Puri, Haoxing Ren, Hua Xiang, Gi-Joon Nam, Fan Mo, and Robert K. Brayton

Routing
Gustavo E. Tellez, Jin Hu, and Yaoguang Wei

Physical Design for 3D ICs
Sung-Kyu Lim

Gate Sizing
Stephan Held and Jiang Hu

Clock Design and Synthesis
Matthew R. Guthaus

Exploring Challenges of Libraries for Electronic Design
James Hogan, Scott T. Becker, and Neal Carney

Design Closure
Peter J. Osler, John M. Cohn, and David Chinnery

Tools for Chip-Package Codesign
Paul D. Franzon and Madhavan Swaminathan

Design Databases
Mark Bales

FPGA Synthesis and Physical Design
Mike Hutton, Vaughn Betz, and Jason Anderson

Simulation of Analog and RF Circuits and Systems
Jaijeet Roychowdhury and Alan Mantooth

Simulation and Modeling for Analog and Mixed-Signal Integrated Circuits
Georges G.E. Gielen and Joel R. Phillips

Layout Tools for Analog Integrated Circuits and Mixed-Signal Systems-on-Chip: A Survey
Rob A. Rutenbar, John M. Cohn, Mark Po-Hung Lin, and Faik Baskaya

Design Rule Checking
Robert Todd, Laurence Grodd, Jimmy Tomblin, Katherine Fetty, and Daniel Liddell

Resolution Enhancement Techniques and Mask Data Preparation
Franklin M. Schellenberg

Design for Manufacturability in the Nanometer Era
Nicola Dragone, Carlo Guardiani, and Andrzej J. Strojwas

Design and Analysis of Power Supply Networks
Rajendran Panda, Sanjay Pant, David Blaauw, and Rajat Chaudhry

Noise in Digital ICs
Igor Keller and Vinod Kariat

Layout Extraction
William Kao, Chi-Yuan Lo, Mark Basel, Raminderpal Singh, Peter Spink, and Louis K. Scheffer

Mixed-Signal Noise Coupling in System-on-Chip Design: Modeling, Analysis, and Validation
Nishath Verghese and Makoto Nagata

Process Simulation
Mark D. Johnson

Device Modeling: From Physics to Electrical Parameter Extraction
Robert W. Dutton, Chang-Hoon Choi, and Edwin C. Kan

High-Accuracy Parasitic Extraction
Mattan Kamon and Ralph Iverson