Designing Digital Computer Systems with Verilog (Paperback)

Preface; 1. Controlling complexity; 2. A verilogical place to start; 3. Defining the instruction set architecture; 4. Algorithmic behavioral modeling; 5. Building an assembler for VeSPA; 6. Pipelining; 7. Implementation of the pipelined processor; 8. Verification; Appendix A: the VeSPA instruction set architecture (ISA); Appendix B: the VASM assembler; Index.